A metal oxide thin film transistor has been paid much attention due to its high mobility and good uniformity and has become a hot research topic recently. The fabrication of an array substrate comprising the metal oxide thin film transistor can be completed by using four patterning processes, specifically comprising: forming a gate electrode and a gate line on a substrate by using a first patterning process; forming a gate insulating layer; forming a pattern of a semiconductor layer, a source electrode, a drain electrode, a data line and a channel of a thin film transistor (TFT) on the gate insulating layer by using a second patterning process; forming a passivation layer in which a via hole is formed by using a third patterning process; forming a pixel electrode being connected with the drain electrode through the via hole by using a fourth patterning process.
The second patterning process specifically comprises: sequentially forming a semiconductor thin film and a source-drain metal layer on the gate insulating layer; coating a photoresist on the source-drain metal layer; using a gray tone or half tone mask to expose and develop the photoresist to form a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, wherein, the photoresist-completely-retained region corresponds to a source electrode region and a drain electrode region, the photoresist-partially-retained region corresponds to a TFT channel region, and the photoresist-completely-removed region corresponds to regions other than the photoresist-completely-retained region and the photoresist-partially-retained region; using an etching process to remove the source-drain metal layer in the photoresist-completely-removed region and the semiconductor thin film below the source-drain metal layer to form the pattern of the semiconductor layer; using an ashing process to remove the photoresist in the photoresist-partially-retained region; removing the source-drain metal layer in the photoresist-partially-retained region by using an etching process, and forming the source electrode, the drain electrode, the data line and the channel region.
When the etching process is used to remove the source-drain metal layer in the photoresist-partially-retained region, as the substrate has a certain thickness, etching end points at different positions of the substrate judged by an etching EPD (End Point Detector) may not be consistent with each other, then a phenomenon of overetching the metal oxide semiconductor thin film in the channel region may occur. When a drying etching is used, an etching gas will react with the metal oxide and then take away oxygen ions in the metal oxide, so that the metal oxide becomes a conductor. When a wet etching is used, because of a relatively longer duration thereof, usually a high-concentration etching solution is used to reduce the etching duration, while the etching solution will react with the metal oxide and take away oxygen ions in the metal oxide, so that the metal oxide becomes a conductor. Therefore, regardless of using the dry etching or the wet etching, the metal oxide in the channel region may become a conductor, so that the transistor fails.
For the above problems, one solution is to form, corresponding to the TFT channel region, an ESL (Etching Stop Layer) above the metal oxide semiconductor layer, thus, during etching the source-drain metal layer, the ESL can protect the semiconductor layer in the TFT channel region. However, this requires an additional patterning process to form the ESL, and then makes the processes complex, the fabricating time long and the fabricating cost high.